M.S. Thesis Presentation by Chetan S. Paydenkar
Tuesday, April 3, 2001

(Dr. Daniel Baldwin, advisor)

"Flip Chip Processing and Reliability of Polymer Stud Grid Array Packaging"


The Polymer Stud Grid Array (PSGA) package is a new and unique type of area array chip package that shows significant advantages over conventional package configurations by virtue of its high potential for miniaturization and process cost saving potential.  This package was designed and manufactured in response to a demand for low cost, moderate pin density packages.

 This work focuses on two key elements of PSGA technology which are: 1) developing a high throughput flip chip assembly process technology for PSGA-CSP configurations using existing Surface Mount Technology (SMT), and 2) qualifying the reliability performance of flip chip PSGA modules. The flip chip interconnection system evaluated is eutectic lead-tin solder. Various flip chip strategies are screened based on underfill materials and associated flip chip process technology.  The underfill materials selected for evaluation are no flow reflowable, fast flow snap cure encapsulants, and high performance underfill systems.  This work discusses issues related to developing a robust high throughput flip chip assembly process and presents reliability based on air-to-air  thermal cycling (-55oC to 125oC), autoclave testing (121oC, 100%RH), and high temperature storage (150oC) of the assembled PSGA Chip Scale Packages (CSPs).