(Dr. Suresh K. Sitaraman, advisor)

"An Integrated Process Modeling Methodology and Module for Sequential Multilayered High-Density Substrate Fabrication for Microelectronic Packages"

Abstract

The growing complexity of electronic circuits and the miniaturization of electronic components has generated significant interest in high-density-wiring (HDW) substrates with finer line widths and spaces and embedded passives. Typically, the HDW substrate fabrication process involves the sequential deposition of alternate layers of copper metallization and polymer dielectric on a base substrate, with photolithographic definition of the interconnect vias. Warpage and stresses arise in such multilayered structures during the sequential fabrication due to the thermal gradients and the mismatch in thermomechanical properties between the different materials. The thermally-induced stresses could result in various failure mechanisms such as delamination or debonding of the layers, interconnect via cracking, and film cracking. The thermally-induced warpage, on the other hand, could lead to misregistration and reduced tolerance and accuracy of the fine interconnect features, as well as misalignment problems during package assembly. Therefore, due to the presence of several new material systems and processing conditions, the traditional build-and-test approach is not cost-effective for designing such multilayered substrates, and an innovative virtual prototyping methodology is required.

In this research, an integrated process modeling methodology and module has been developed for simulating the large-area fabrication of the HDW substrate. This consists of a fully-coupled cure kinetics-heat transfer-stress finite element analysis approach, where the deposition and curing of the interlayer polymer dielectric on a base substrate has been simulated by activating the respective elements at the gel point. An extensive experimental investigation of the curing behavior and characterization of the thermomechanical material properties has been done for the selected thin film photo-dielectric dry film (PDDF) material, Vialux 81^TM. Phenomenological models have been developed for the cure kinetics, the cure-induced shrinkage and the cure-dependent viscoelastic stress relaxation modulus. These models have been incorporated into the integrated process modeling module through user-defined subroutines for the exothermic heat liberated during curing, and the cure-dependent, isotropic, linear viscoelastic behavior, inclusive of cure shrinkage and thermal expansion effects. Experimental validation of the time and temperature-dependent evolution of warpage and stress during the polymer curing process has also been done. In addition, a cure process optimization strategy has been devised, and the fabrication of microvias and fine features has been demonstrated.